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Jean-Serge Cardinal


Last seen: 2 months 前 |  自 2021 起处于活动状态

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统计学

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Memory not Initialized in Simulink HDL causing problems in FPGA simulation.
The FPGA simulation, like modelsim, does not like reading from not initialized memory, it creates undefined signals. But I canno...

2 years 前 | 1 个回答 | 0

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Is it possible to have tags=signal name in Simulink?
The Goto and From blocks in Simulink are not using the signal names, they have there own "tag" name, which is anoying. Is there ...

2 years 前 | 1 个回答 | 0

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'CEF Helper' ate all my RAM and abused my GPU - what is it doing?
I fix this problem by upgrading from Kubuntu from 18 to 21.

2 years 前 | 0

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In HDL Simulink, How to convert from integer to boolean array.
I can do it with a bunch of "Extract Bits" block, one for every bit. Is there a better way with HDL blocks?

2 years 前 | 1 个回答 | 0

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'CEF Helper' ate all my RAM and abused my GPU - what is it doing?
I also have a problem with cef_helper on version 2021b. The computer hangs a few seconds once a while, and I can hear the fan sp...

3 years 前 | 1

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cef_helper with Simulink 2021b in Linux
With Simulink 2021b, my computer hangs for a few seconds once every about 30seconds. In the processes, I notice that cef_helper ...

3 years 前 | 1 个回答 | 0

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