From High-Level Algorithms to ASML Automated Digital Design Flows
John van Tol, ASML
ASML is the world's leading manufacturer of lithography systems for the semiconductor industry. These complex machines are critical for producing integrated circuits or chips.
Quality and time to market are the two main drivers for this business. At first sight, these interests appear to be conflicting, but by making the right choices, the outcome for both factors can be favorable.
The focus of this presentation is twofold. First, the adoption of HDL Coder™, which automatically generates HDL source code and test bench code into the ASML FPGA design flow. John van Tol of ASML will show which steps need to be taken to implement HDL Coder in a customized development environment. Secondly, the reduction of the gap between system architect and engineer. John will then discuss the use of Model-Based Design by the system architect and FPGA designer and the major benefits of this approach. Applying these techniques will ensure that the quality improves, and the introduction time of new functionality diminishes.
Recorded: 21 May 2019
Related Products
Learn More
Featured Product
Simulink
Up Next:
Related Videos:
您也可以从以下列表中选择网站:
如何获得最佳网站性能
选择中国网站(中文或英文)以获得最佳网站性能。其他 MathWorks 国家/地区网站并未针对您所在位置的访问进行优化。
美洲
- América Latina (Español)
- Canada (English)
- United States (English)
欧洲
- Belgium (English)
- Denmark (English)
- Deutschland (Deutsch)
- España (Español)
- Finland (English)
- France (Français)
- Ireland (English)
- Italia (Italiano)
- Luxembourg (English)
- Netherlands (English)
- Norway (English)
- Österreich (Deutsch)
- Portugal (English)
- Sweden (English)
- Switzerland
- United Kingdom (English)
亚太
- Australia (English)
- India (English)
- New Zealand (English)
- 中国
- 日本Japanese (日本語)
- 한국Korean (한국어)