Requirements Modeling and Design Verification of Embedded Systems

Think of requirements that describe unwanted functionality such as “thrust reverser shall not deploy while in flight.” What kind of test can verify that something shall never happen? Textual requirements are prone to misinterpretation, and some requirements are by nature extremely difficult to test.

Testing in simulation is a proven way to improve traditional code and hardware-based verification processes. As with any type of testing, simulation has its limitations - requirements often need to be interpreted, and to gain confidence in the correctness of the design a large number of tests need to be created by hand. In some cases, like in the example requirement above additional levels of confidence may be required that go beyond testing.

Simulink Design Verifier enables you to formally capture design properties and functional requirements in the modeling environment. Modeling design properties together with analysis using formal methods helps you improve your designs as well as to reveal unanticipated functionality that would be difficult to uncover by simulation alone.

 

 

Note: Simulink Verification and Validation transitioned to Simulink Check, Simulink Coverage, and Requirements Toolbox in R2017b.