自定义板和参考设计

为 Microchip SoC 器件定义和注册自定义参考设计或自定义板

HDL Coder™ 可以生成可部署到 Microchip FPGA 板上的 IP 核。您可以将生成的 IP 核集成到默认系统参考设计中，或集成到可以为板注册的自定义参考设计中。

类

`hdlcoder.Board`	Board registration object that describes SoC custom board
`hdlcoder.WorkflowConfig`	Configure HDL code generation and deployment workflows
`hdlcoder.ReferenceDesign`	Reference design registration object that describes SoC reference design

`addExternalIOInterface`	Define external IO interface for board object
`addExternalPortInterface`	Define external port interface for board object
`addInternalIOInterface`	Add and define internal IO interface between generated IP core and existing IP cores
`addAXI4SlaveInterface`	Add and define AXI4 slave interface
`addClockInterface`	Add clock and reset interface

`addCustomLiberoDesign`	Specify Microchip Libero SoC exported block design Tcl file (自 R2022b 起)
`addCustomMSSConfig`	Import microcontroller subsystem (MSS) in Microchip Libero Smart design (自 R2022b 起)
`validateReferenceDesign`	Check property values in reference design object
`validateBoard`	Check property values in board object

Board and Reference Design Registration System
System for defining and registering boards and reference designs.
Register a Custom Board
Define the interface and attributes of a custom SoC board. After defining the board, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.
Register a Custom Reference Design
Define the interface and attributes of a custom SoC reference design. After defining and registering the reference design, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.
Define and Add IP Repository to Custom Reference Design
Learn how you can create an IP repository and add the IP modules in the repository to your custom reference design.