Guidelines for Speed and Area Optimizations

Guidelines for Speed and Area Optimizations - By Numbered List

The HDL modeling guidelines are a set of recommended guidelines that you can follow when creating Simulink^® model for code generation with HDL Coder™. In addition to providing architectural guidance, because the generated code targets hardware platforms such as FPGAs, ASICs, and SoCs, you can use these guidelines to optimize your design for speed or area on the target hardware.. Each modeling guideline for HDL code generation has a different level of severity that indicates the levels of compliance requirements. To learn more about these severity levels, see HDL Modeling Guidelines Severity Levels.

These tables list the guidelines for speed and area optimizations in HDL Coder. The guidelines start from 3.1 and are divided into subsections. These guidelines do not have an associated model check. You can follow the modeling pattern recommended for these guidelines by running that check in the HDL Code Advisor. To learn more about the HDL Code Advisor, see Check HDL Compatibility of Simulink Model Using HDL Code Advisor.

Guidelines 3.1: Resource Sharing and Streaming

Guideline ID	Title	Severity	Associated Model Check/Coding Standard Rule
3.1.1	Resource Sharing of Add Blocks	Recommended	None
3.1.2	Resource Sharing of Gain Blocks	Recommended	None
3.1.3	Resource Sharing of Product Blocks	Recommended	None
3.1.4	Resource Sharing of Multiply-Add Blocks	Recommended	None
3.1.5	General Considerations for Sharing of Subsystems	Recommended	None
3.1.6	Use MATLAB Datapath Architecture for Sharing with MATLAB Function Blocks	Recommended	None
3.1.7	Sharing of Subsystems	Recommended	None
3.1.8	Resource Sharing of Floating-Point IPs	Recommended	None
3.1.9	Use StreamingFactor for Resource Sharing of Vector Signals	Informative	None
3.1.10	Use SharingFactor and HDL Block Properties for Sharing Matrix Multiplication Operations	Informative	None

Guidelines 3.2: Clock Rate Pipelining and Distributed Pipelining

Guideline ID	Title	Severity	Associated Model Check/Coding Standard Rule
3.2.1	Clock-Rate Pipelining Guidelines	Informative	None
3.2.2	Recommended Distributed Pipelining Settings	Recommended	None
3.2.3	Insert Distributed Pipeline Registers for Blocks with Vector Data Type Inputs	Informative	None