checkStatus

Check current status of FPGA data capture in nonblocking mode

Since R2022a

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Syntax

status = checkStatus(DC)

Description

status = checkStatus(DC) returns the current status of the data capture object DC in nonblocking capture mode.

Note

The checkStatus function is not supported in blocking capture mode.

example

Examples

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Before you use this example, you must have previously generated the customized data capture object using the FPGA Data Capture Component Generator tool. You must also have integrated the generated IP code into your project and deployed it to the FPGA. The data capture object communicates with the FPGA over a JTAG cable. Make sure that the required cable is connected between the board and the host computer.

AMD® device only — Create a data capture object, DC, that captures data from a design running on an FPGA. datacapture1 is the generated IP name you specified in the FPGA Data Capture Component Generator tool.

DC = datacapture1
DC = 

  datacapture with properties:

              Connection: 'JTAG'
         DataCaptureName: 'datacapture1'
    IsConditionalCapture: 0
              MemoryType: 'Internal memory'
         TriggerPosition: 0
       NumCaptureWindows: 1
        NumTriggerStages: 1
                 TimeOut: 10
       EnableCaptureCtrl: 0
           JTAGCableName: 'auto'
           JTAGCableType: 'auto'
       JTAGChainPosition: 0
          IRLengthBefore: 0
           IRLengthAfter: 0
            TckFrequency: 15
       MemoryBaseAddress: '80000000'
     MaxNumTriggerStages: 1
             CaptureMode: 'blocking'

Intel® device only — Create a data capture object, DC, that captures data from a design running on an FPGA. datacapture1 is the generated IP name you specified in the FPGA Data Capture Component Generator tool.

DC = datacapture1
DC = 

  datacapture with properties:

              Connection: 'JTAG'
         DataCaptureName: 'datacapture1'
    IsConditionalCapture: 0
         TriggerPosition: 0
       NumCaptureWindows: 1
        NumTriggerStages: 1
                 TimeOut: 10
       EnableCaptureCtrl: 0
           JTAGCableName: 'auto'
     MaxNumTriggerStages: 1
             CaptureMode: 'blocking'

Change the capture mode to nonblocking mode.

DC.CaptureMode = 'nonblocking';

Check the current status of the data capture object.

status = checkStatus(DC)
status = 

  struct with fields:

    CapturedWindows: 0
          RunStatus: 'Not started'
       TriggerStage: 0

Call the data capture object to capture data. The data is captured immediately from the FPGA.

[Capture_Window,Trigger_Position,dataOut] = DC();

Check the current status of the data capture object.

status = checkStatus(DC)
status = 

  struct with fields:

    CapturedWindows: 1
          RunStatus: 'Successfully captured data from FPGA'
       TriggerStage: 0

Input Arguments

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Customized data capture object, specified as an hdlverifier.FPGADataReader System object.

Output Arguments

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Current status of the data capture object, returned as a structure containing fields for these signals.

  • CapturedWindows — This signal indicates the total number of windows captured so far.

  • RunStatus — This signal indicates the current running status of the data capture object using one of these options.

    • 'Not started' — Data capture not started.

    • 'Waiting for trigger' — Data capture object is waiting for a trigger event to start data capture.

    • 'Evaluating capture condition' — Data capture object is evaluating the capture condition.

    • 'Successfully captured data from FPGA' — Data captured successfully from the FPGA.

    • 'Stopped' — Data capture has stopped.

  • TriggerStage — This signal indicates the trigger stage under evaluation for the run status 'Waiting for trigger'. For the run statuses 'Evaluating capture condition', 'Successfully captured data from FPGA', and 'Stopped', this signal indicates the updated value of the trigger stage.

Version History

Introduced in R2022a

See Also

Objects

Tools