Architectural Signal Integrity Kits

Use the architectural signal integrity kits and the Serial Link Designer or Parallel Link Designer app to set up a complete signal integrity environment for a specific interface technology. These kits include technology models for all components, generic topologies for each transfer net, a detailed setup for model characterization, channel compliance, and detailed documentation. You can also reconfigure these kits to meet specific requirements.

Architectural signal integrity kit technology models are set up with a single differential pin-pair representing each of the transfer nets. Furthermore, all topologies are set up as point-to-point, with little or no PCB termination applied. You will need to replace or edit the topologies and IBIS-AMI models with topologies and models that are appropriate to your application. An example of an architectural signal integrity kit is Low-Power DDR5 Architectural Kit.

Implementation Signal Integrity Kits

Implementation signal integrity kits are customized versions of the architectural signal integrity kits that uses design-specific simulation models and topologies (such as terminations or configurations.) These kits represent your exact interface implementation. Implementation kits support complete pre-layout solution space analysis and/or full post-layout verification for waveform quality and timing margins. An example of an implementation signal integrity kit is DDR5 Implementation Kit.

Compliance Signal Integrity Kits

Use the compliance signal integrity kit to test the compliance of simulation models and topologies to a specific industry standard specification. These tests can include transmitter model compliance, receiver model compliance, channel compliance, and end-to-end compliance of a specific implementation as applicable. Each type of compliance may include one or more checks spanning eye masks, frequency domain masks, and other metrics. An example of a compliance signal integrity kit is PCIe-5 Compliance Kit.