Saturation Dynamic

Input	Output
`lo` ≤ Input value ≤ `up`	Input value
Input value < `lo`	Lower limit
Input value > `up`	Upper limit

Ports

Input

u — Input signal
scalar | vector

The input signal to the saturation algorithm.

up — Signal that provides the upper saturation limit
scalar | vector

Dynamic value providing the upper saturation limit. When the input is greater than up then the output value is bound to up.

lo — Signal that provides the lower saturation limit
scalar | vector

Dynamic value providing the lower saturation limit. When the input is less than lo then the output value is bound to lo.

Output

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y — Output signal
scalar | vector

Output signal that is the value of the input signal, upper saturation limit, or lower saturation limit.

Parameters

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To edit the parameters for the Saturation Dynamic block, double-click the block icon.

The Data Type Assistant helps you set data attributes. To use the Data Type Assistant, click . For more information, see Specify Data Types Using Data Type Assistant.

Output minimum — Minimum output value for range checking
`[]` (default) | scalar

Lower value of the output range that the software checks.

The software uses the minimum to perform:

Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixed-point data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).

Tips

Output minimum does not saturate or clip the actual output signal. Use the Saturation block instead.

Programmatic Use

To set the block parameter value programmatically, use the set_param function.

Parameter:	`OutMin`
Values:	`'[]'` (default) \| scalar in quotes

Output maximum — Maximum output value for range checking
`[]` (default) | scalar

Upper value of the output range that the software checks.

The software uses the maximum value to perform:

Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixed-point data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).

Tips

Output maximum does not saturate or clip the actual output signal. Use the Saturation block instead.

Programmatic Use

To set the block parameter value programmatically, use the set_param function.

Parameter:	`OutMax`
Values:	`'[]'` (default) \| scalar in quotes

Output data type — Specify the output data type
`Inherit: Same as second input` (default) | `Inherit: Inherit via back propagation` | `double` | `single` | `int8` | `int32` | `uint32` | `int64` | `uint64` | `fixdt(1,16,2^0,0)` | `<data type expression>` | ...

Choose the data type for the output. The type can be inherited, specified directly, or expressed as a data type object such as a Simulink.NumericType object. For more information, see Control Data Types of Signals.

Programmatic Use

Block Parameter: OutDataTypeStr

Type: character vector

Values:

'Inherit: Same
									as second input'

|

'Inherit: Inherit via back
									propagation'

'<data type
									expression>'

Default:

'Inherit:
									Same as input'

Lock output data type setting against changes by the fixed-point tools — Option to prevent fixed-point tools from overriding Output data type
`off` (default) | `on`

Select this parameter to prevent the fixed-point tools from overriding the Output data type you specify on the block. For more information, see Use Lock Output Data Type Setting (Fixed-Point Designer).

Programmatic Use

To set the block parameter value programmatically, use the set_param function.

Parameter:	`LockScale`
Values:	`'off'` (default) \| `'on'`

Integer rounding mode — Specify the rounding mode for fixed-point operations
`Floor` (default) | `Ceiling` | `Convergent` | `Nearest` | `Round` | `Simplest` | `Zero`

Choose one of these rounding modes.

Ceiling: Rounds both positive and negative numbers toward positive infinity. Equivalent to the MATLAB^® ceil function.
Convergent: Rounds number to the nearest representable value. If a tie occurs, rounds to the nearest even integer. Equivalent to the Fixed-Point Designer™ convergent function.
Floor: Rounds both positive and negative numbers toward negative infinity. Equivalent to the MATLAB floor function.
Nearest: Rounds number to the nearest representable value. If a tie occurs, rounds toward positive infinity. Equivalent to the Fixed-Point Designer nearest function.
Round: Rounds number to the nearest representable value. If a tie occurs, rounds positive numbers toward positive infinity and rounds negative numbers toward negative infinity. Equivalent to the Fixed-Point Designer round function.
Simplest: Automatically chooses between round toward floor and round toward zero to generate rounding code that is as efficient as possible.
Zero: Rounds number toward zero. Equivalent to the MATLAB fix function.

Programmatic Use

Block Parameter: RndMeth

Type: character vector

Default: 'Floor'

Saturate on integer overflow — Method of overflow action
`off` (default) | `on`

Specify whether overflows saturate or wrap.

on — Overflows saturate to either the minimum or maximum value that the data type can represent.
off — Overflows wrap to the appropriate value that the data type can represent.

For example, the maximum value that the signed 8-bit integer int8 can represent is 127. Any block operation result greater than this maximum value causes overflow of the 8-bit integer.

With this parameter selected, the block output saturates at 127. Similarly, the block output saturates at a minimum output value of -128.
With this parameter cleared, the software interprets the overflow-causing value as int8, which can produce an unintended result. For example, a block result of 130 (binary 1000 0010) expressed as int8 is -126.

Tips

Consider selecting this parameter when your model has a possible overflow and you want explicit saturation protection in the generated code.
Consider clearing this parameter when you want to optimize efficiency of your generated code. Clearing this parameter also helps you to avoid overspecifying how a block handles out-of-range signals. For more information, see Troubleshoot Signal Range Errors.
When you select this parameter, saturation applies to every internal operation on the block, not just the output or result.
In general, the code generation process can detect when overflow is not possible. In this case, the code generator does not produce saturation code.

Programmatic Use

Block Parameter: DoSatur

Type: character vector

Values: 'off' | 'on'

Default: 'off'

Block Characteristics

Data Types	`Boolean^a` \| `double` \| `fixed point` \| `integer` \| `single`
Direct Feedthrough	`no`
Multidimensional Signals	`no`
Variable-Size Signals	`no`
Zero-Crossing Detection	`no`
^a This block is not recommended for use with Boolean signals.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation
Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.

HDL Architecture

This block has one default HDL architecture.

HDL Block Properties

ConstrainedOutputPipeline	Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is `0`. For more details, see ConstrainedOutputPipeline (HDL Coder).
InputPipeline	Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is `0`. For more details, see InputPipeline (HDL Coder).
OutputPipeline	Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is `0`. For more details, see OutputPipeline (HDL Coder).

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

Introduced before R2006a

Saturation Dynamic

Description

Ports

Input

u — Input signal
scalar | vector

up — Signal that provides the upper saturation limit
scalar | vector

lo — Signal that provides the lower saturation limit
scalar | vector

Output

y — Output signal
scalar | vector

Parameters

Output minimum — Minimum output value for range checking
`[]` (default) | scalar

Tips

Programmatic Use

Output maximum — Maximum output value for range checking
`[]` (default) | scalar

Tips

Programmatic Use

Output data type — Specify the output data type
`Inherit: Same as second input` (default) | `Inherit: Inherit via back propagation` | `double` | `single` | `int8` | `int32` | `uint32` | `int64` | `uint64` | `fixdt(1,16,2^0,0)` | `<data type expression>` | ...

Programmatic Use

Lock output data type setting against changes by the fixed-point tools — Option to prevent fixed-point tools from overriding Output data type
`off` (default) | `on`

Programmatic Use

Integer rounding mode — Specify the rounding mode for fixed-point operations
`Floor` (default) | `Ceiling` | `Convergent` | `Nearest` | `Round` | `Simplest` | `Zero`

Programmatic Use

See Also

Saturate on integer overflow — Method of overflow action
`off` (default) | `on`

Tips

Programmatic Use

Block Characteristics

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation
Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

See Also

Saturation Dynamic

Description

Ports

Input

u — Input signal scalar | vector

up — Signal that provides the upper saturation limit scalar | vector

lo — Signal that provides the lower saturation limit scalar | vector

Output

y — Output signal scalar | vector

Parameters

Output minimum — Minimum output value for range checking [] (default) | scalar

Tips

Programmatic Use

Output maximum — Maximum output value for range checking [] (default) | scalar

Tips

Programmatic Use

Output data type — Specify the output data type Inherit: Same as second input (default) | Inherit: Inherit via back propagation | double | single | int8 | int32 | uint32 | int64 | uint64 | fixdt(1,16,2^0,0) | <data type expression> | ...

Programmatic Use

Lock output data type setting against changes by the fixed-point tools — Option to prevent fixed-point tools from overriding Output data type off (default) | on

Programmatic Use

Integer rounding mode — Specify the rounding mode for fixed-point operations Floor (default) | Ceiling | Convergent | Nearest | Round | Simplest | Zero

Programmatic Use

See Also

Saturate on integer overflow — Method of overflow action off (default) | on

Tips

Programmatic Use

Block Characteristics

Extended Capabilities

C/C++ Code Generation Generate C and C++ code using Simulink® Coder™.

HDL Code Generation Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

PLC Code Generation Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

See Also

u — Input signal
scalar | vector

up — Signal that provides the upper saturation limit
scalar | vector

lo — Signal that provides the lower saturation limit
scalar | vector

y — Output signal
scalar | vector

Output minimum — Minimum output value for range checking
`[]` (default) | scalar

Output maximum — Maximum output value for range checking
`[]` (default) | scalar

Output data type — Specify the output data type
`Inherit: Same as second input` (default) | `Inherit: Inherit via back propagation` | `double` | `single` | `int8` | `int32` | `uint32` | `int64` | `uint64` | `fixdt(1,16,2^0,0)` | `<data type expression>` | ...

Lock output data type setting against changes by the fixed-point tools — Option to prevent fixed-point tools from overriding Output data type
`off` (default) | `on`

Integer rounding mode — Specify the rounding mode for fixed-point operations
`Floor` (default) | `Ceiling` | `Convergent` | `Nearest` | `Round` | `Simplest` | `Zero`

Saturate on integer overflow — Method of overflow action
`off` (default) | `on`

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation
Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.