Simulink automatically generates Verilog. How should it run on FPGA

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wang
wang 2023-3-21
回答： Sahas 2024-12-19
I have generated Verolig from part of the module, how do I run this part of Verilog on the FPGA?
“bufen”This subsystem has generated Verilog.And need to measure the time used to run on FPGA.
I plan to run the original algorithm on MATLAB and only this small part on FPGA.

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Sahas
Sahas 2024-12-19
Hi @wang,
As per my understanding you would like to deploy a small part of your Simulink model on FPGA. I would recommend you to make a separate module and manage the input and outputs using a wrapper.
To deploy your algorithm from Simulink or MATLAB to an FPGA, refer to the following MathWorks examples and documentation links:
I hope this would help you get started!

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