Design, Evaluate and Implement SoC Hardware and Software Architectures
From the series: Signal Processing and Wireless – Webinar Series
Overview
The competing demands of functional innovation, aggressive schedules, and product quality have significantly strained traditional FPGA, ASIC, and SoC development workflows.
This talk shows how you can use Model-Based Design with MATLAB® and Simulink® for algorithm and system-level design and verification.
Highlights
- Verify the functionality of algorithms in the system context and refine algorithms with data types and architectures suitable for FPGA, ASIC, and SoC implementation
- Simulate hardware and software architectures, including memory, internal/external connectivity, and task scheduling
- Generate optimized, readable HDL code for Programmable Logic and C/C++ code for Processor System, exploring tradeoffs
- Verify and validate system-level models through Co-simulation, System Verilog DPI generation, FPGA-in the-loop and FPGA data capture options
About the Presenter
Kishore Siddani is an application engineer at MathWorks India specializing in design and implementation of signal processing and communications applications. He works closely with customers across domains to help them adopt MATLAB® and Simulink® in their workflows. Prior to joining MathWorks, Kishore worked for Huawei Technologies, handling telecom clients globally in around 7 countries. He was also an engineer at Uurmi Solutions, where he was involved in the design and development of custom OFDM communication system for defense applications. Kishore holds a bachelor’s degree in electronics and communication engineering from Jawaharlal Nehru Technological University Kakinada.
Recorded: 28 Nov 2020
