Main Content

Prototype Deep Learning Networks on FPGA

Estimate performance of series networks. Profile and retrieve inference results from target devices using MATLAB®

Deep Learning HDL Toolbox™ provides classes to create objects to deploy series deep learning networks to target FPGA and SoC boards. Before deploying deep learning networks onto target FPGA and SoC boards, leverage the methods to estimate the performance and resource utilization of the custom deep learning network. After you deploy the deep learning network, use MATLAB to retrieve the network prediction results from the target FPGA board.


expand all

dlhdl.WorkflowConfigure deployment workflow for deep learning neural network (Since R2020b)
dlhdl.TargetConfigure interface to target board for workflow deployment (Since R2020b)
dlhdl.SimulatorCreate an object that retrieves intermediate layer results and validate deep learning network prediction accuracy (Since R2021b)


expand all

activations Retrieve intermediate layer results for deployed deep learning network (Since R2020b)
compile Compile workflow object (Since R2020b)
deploy Deploy the specified neural network to the target FPGA board (Since R2020b)
getBuildInfoRetrieve bitstream resource utilization (Since R2021a)
predictPredict responses by using deployed network (Since R2020b)
activations Retrieve intermediate layers results for dlhdl.Simulator object (Since R2021b)
predictRetrieve prediction results for dlhdl.Simulator object (Since R2021b)
validateConnectionValidate SSH connection and deployed bitstream (Since R2020b)
releaseRelease the connection to the target device (Since R2020b)