Multicore Simulation and Code Generation Using Infineon AURIX

Design, simulate and generate code for multicore models of Infineon^® AURIX™ TC3x microcontrollers

The Infineon AURIX TC3x microcontrollers have multiple homogenous TriCore^® processing units. The TC39x series comprises of six TriCores (TriCore0 to TriCore5), TC38x series has four TriCores (TriCore0 to TriCore3), and the TC37x series has three TriCores (TriCore0 to TriCore2). The TriCore0 is the principal core and the remaining cores act as auxiliary cores.

You can run different models on the available cores or you can partition complex models to run concurrently on these multiple cores to achieve design modularity. The Interprocess Data Channel block handles communication between the multiple cores. After simulating the multicore model, you can deploy the generated code on an Infineon AURIX TC3x hardware board using the SoC Builder tool and monitor the signals from the hardware using the One Eye tool from Infineon.

Use the SoC Builder tool to generate executables, code, and program the hardware board. See Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC3x Microcontrollers example to understand how to validate, build, and run a multicore model to generate executables, code, and program the Infineon AURIX TC4x hardware board.

Blocks

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Interface

ADC Interface	Convert analog signal on ADC input pin to digital signal (Since R2020b)
PWM Interface	Simulate pulse width modulation (PWM) output from hardware (Since R2020b)
Digital IO Interface	Simulate digital input and output pins on processor (Since R2021b)

Interprocess Data Communication

Interprocess Data Read	Receive messages from another processor using interprocess communication channel (Since R2020b)
Interprocess Data Write	Send messages to another processor using interprocessor data write (Since R2020b)
Interprocess Data Channel	Model interprocessor data channel between two processors (Since R2020b)

Task Management

Task Manager	Create and manage task executions in Simulink model
Event Source	Simulate and playback recorded task events (Since R2020b)

Tools

SoC Builder	Build, load, and execute multicore application models on Infineon AURIX TC4x hardware boards (Since R2024b)
Hardware Mapping	Map tasks and peripherals in a model to hardware board configurations (Since R2022b)

Topics

Top-Level Models Using TriCores of Infineon AURIX
Simulate, and generate code for top-level models with referenced models using TriCores of Infineon AURIX microcontrollers.
Generate Code and Deploy Using SoC Builder
Generate code and run it on the target hardware board using the SoC Builder tool.

Featured Examples

Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC3x Microcontrollers

Use Embedded Coder® Support Package for Infineon® AURIX™ TC3x Microcontrollers to implement multicore modeling and communication between two cores on an Infineon® AURIX™ microcontroller. This example uses a top-level model and two referenced models for two-way multicore data communication. The model supports both simulation and code generation. You can simulate the model and deploy the code on an Infineon AURIX TC3x hardware board using the Soc Builder tool and observe the blinking of the configured LEDs of each core to verify the communication between the cores.

Open Model