主要内容

Delay Balancing

R2026b
Insert matching delays on parallel signal paths

When optimizations or block implementation options introduce latency along the critical path in a model, the numerical calculations of the original model and the generated model or HDL code can differ from each other in certain time steps because equivalent delays are not introduced on other, parallel signal paths. With delay balancing, HDL Coder™ detects introduced latency along one path and then inserts matching delays on the other paths in your generated model.

Topics

Troubleshooting

Resolve Delays Not Absorbed During Delay Balancing

Troubleshoot extra latency not absorbed during HDL code generation.

Featured Examples