Guidelines for Supported Blocks and Data Type Settings

Supported blocks and data type considerations for HDL code generation

The HDL modeling guidelines are a set of recommended guidelines for creating Simulink^® models, MATLAB Function blocks, and Stateflow^® charts for code generation with HDL Coder™. The guidelines for supported blocks and data types consist of guidelines for using various blocks in the HDL Coder block library, and about the supported data types.

Topics

List of Guidelines and Severity Levels

Guidelines for Supported Blocks and Data Types - By Numbered List
List of supported blocks and data type guidelines in ascending order of Guideline ID.
HDL Modeling Guidelines Severity Levels
Various severity levels associated with the HDL modeling guidelines and their description.

Guidelines for Blocks in HDL Coder Libraries (Guideline ID 2.1 - 2.7)

Design Considerations for RAM Blocks and Blocks in HDL Operations Library
How to use blocks in the HDL RAMs and HDL Operations libraries.
Usage of Blocks in Logic and Bit Operations Library
Different blocks that perform logical and bitwise operations and how to use them.
Generate FPGA Block RAM from Lookup Tables
How to map lookup table blocks to Block RAMs.
Guidelines for Using Selector Blocks to Extract Input Elements from Vector or Matrix Signals
Guidelines for using Selector block in HDL implementation.
Guidelines for Using Assignment Blocks to Write Elements in Vectors, Matrices, and 3-D Arrays
Guideline to use assignment block to write specified elements in vector, matrix or 3-D arrays.
Recommended Block Parameter Settings of Multiport Switch Block for Numeric and Enumerated Types
Use recommended block settings for Multiport Switch with numeric and enumerated types for HDL code generation.
Usage of Different Subsystem Types
Different types of subsystems and guidelines for using them.
Usage of Rate Change and Constant Blocks
How to effectively use blocks that perform rate transitions and constant blocks.
Guidelines for Using Delays and Goto and From Blocks for HDL Code Generation
Recommended usage of Delay blocks that are inferred as registers.
Modeling Efficient Multiplication and Division Operations for FPGA Targeting
Model high-speed division operations and multiplier and adder blocks for DSP mapping.

Guidelines for MATLAB Function Blocks and Stateflow Charts (Guideline ID 2.8 - 2.9)

Using Persistent Variables and fi Objects Inside MATLAB Function Blocks for HDL Code Generation
Recommended usage of MATLAB Function blocks that contain persistent variables inside the MATLAB^® code.
Guidelines for HDL Code Generation Using Stateflow Charts
Recommended usage of Stateflow charts for HDL code generation.

Data Type Guidelines (Guideline ID 2.10)

Simulink Data Type Considerations
High-level recommendations for data type settings when modeling in Simulink.
Guidelines for Using Rounding and Saturation Settings for Fixed-Point Data Types
Recommended settings for using rounding modes and saturate on integer overflow for fixed-point data types.

Guidelines for Square Root Block (Guideline ID 2.11)

Guideline for Using Sqrt Block for HDL Code Generation
Modeling efficient square root block for FPGA targeting.