Customize Parallel Link Project for Pre-Layout Analysis

You can modify the schematic elements to customize your designs in the Parallel Link Designer. app.

Using I/O buffers

An I/O buffer is represented by a designator. You change the buffer model for a designator in three ways:

Edit Designator Part/Pins dialog box
Right clicking on the designator and selecting Edit Designator Part/Pins opens the Edit Designator Part/Pins dialog box. The Designator parameter allows the designator name to be changed. The Part Name parameter lists the parts in all libraries. When a specific part is selected in the dropdown menu, the IBIS file name referenced by that part is shown in the IBIS File parameter. The IBIS component name for the selected part is shown in the IBIS Component parameter. The table on the left shows all of the pins in the IBIS component. To associate a pin or pins with the designator select the pin or pins on the left and click one of the arrow buttons between the two tables. The pins in the table on the left can be filtered using the Wildcard Filter parameter. To add a column that shows the name of the transfer net that uses the pins, select Generate Used Pin Information.
Select IBIS File & Model dialog box
Right clicking on the designator and selecting Select IBIS Model and File opens the Select IBIS File & Model dialog box. You can select an IBIS file from the table provided, or import your own. You can also select one or more pins from the table of pins in the selected IBIS files.
Default model
To assign a default model to a designator, right click on the designator and select Use Default Driver, Use Default Receiver or Use Default I/O.

Using Transmission Lines

The app uses two types of transmission lines:

Ideal transmission lines
Ideal transmission line models have two parameters: Impedance (Z0) and delay (Tpd). These parameters are set from the Element Properties dialog box for ideal transmission lines. Double click on an ideal transmission line symbol on the schematic to launch the Element Properties dialog box. There are columns for Impedance and Delay/Distance and checkboxes to sweep the parameters. Checking a sweep checkbox creates a variable in the solution space for the parameter.
The model on the schematic is the model for the typical etch corner. If other etch corners are simulated the Z0 and Tpd parameters are scaled according to the corner conditions specified in the Corner Conditions dialog box. See Specify Corner Conditions in Parallel Link Design for more information.
Lossy transmission lines
The lossy transmission line have a frequency dependent RLGC model that is created by a 2-D field solver.
The app has a field solver with a transmission line editor for entering a cross-section. The transmission line editor can be used to create models in the libraries or to edit the model for a symbol. For more information, see Model Lossy Transmission Lines in Parallel Link Designer.
To associate a model in the library with the transmission line, right click on the symbol and choose Select T-Line Model. You can edit the default model by right clicking on the symbol and choosing Edit T-Line Model.

Using Vias

You can create via models based on a stackup and via physical parameters. Via models can be single-ended or differential. The first time a via symbol is placed on a sheet the default stackup is created. A dialog launches to allow the number of signal layers in the default stackup to be specified. For more information, see Via and Stackup Management in Parallel Link Project.

Using S-Parameters

S-Parameter files must be imported into the app before being used on a sheet. After importing and adding the S-Parameter to your schematic, you can edit the port map by right clicking on the S-Parameter symbol and selecting Edit Port Map.

Using STAT Mode

STAT Mode is a simulation mode that uses a statistical engine to perform network characterization, statistical and time domain simulations. The simulation methodology is derived from the IBIS-AMI specification for performing high speed channel simulations with IBIS-AMI models. STAT mode can also be used to simulate any type of buffer models (IBIS or SPICE) to analyze the response and performance of a network through statistical and time domain analysis.

The app performs network characterization using HSPICE to determine the network's response to a step input it then post-processes that information to derive the network transfer function. The transfer function is used by the statistical engine to determine the statistical eye along with a bit error ratio (BER) and other data. Statistical analysis is based on an LTI (Linear Time Invariant) network assumption along with LTI equalization (if supported by the model).

Time Domain Analysis uses the same network characterization results as statistical along with a bit sequence to derive the output waveform, persistent eye, BER estimate and other data. The persistent eye is the amplitude statistics accumulated from a specific time domain waveform. It is accumulated by triggering using an ideal recovered clock in exactly the same way that an eye diagram is accumulated in a modern digital sampling scope. Unlike statistical analysis time domain analysis is a bit-by-bit simulation that can be used to analyze the network with any non-LTI behavior taken into account.

The STAT Mode control is in the Sheet Options area of the solution space panel.