Stateflow

 

Stateflow

Model and simulate decision logic using state machines and flow charts

Design State Machines

With Stateflow, you can design state machines using drag and drop elements and simple logic statements. Stateflow Onramp and training are available to help you get started.

State chart with multiple states and MATLAB function blocks. The “exchange” state contains logic represented using a flow chart to determine whether it enters into one of two child states or exits the state.

Create Flow Charts

You can use flow charts to represent state logic. The Pattern Wizard lets you automatically generate flow charts for common logic patterns.

Model Logic with Tables

Stateflow has State Transition Tables and Truth Tables. State Transition Tables offer a tabular view for modeling logic, and Truth Tables implement combinatorial logic design in a tabular format.

Execute Stateflow Charts

When executing your state diagram, animations highlight active states and transitions. You can manually modify variables during execution to visualize their impact on the system.

On the left is a Stateflow chart for a manual gear shift. The simulation data for two of the chart’s states are captured in graphs on the right, with arrows identifying each state’s corresponding plot.

Monitor and Analyze Data

Simulation Data Inspector provides the ability to visualize simulation data. With this tool, you can monitor a system to gather valuable insights on its behavior.

Debug Logic in Stateflow

Stateflow debugging capabilities let you step through chart execution in detail. You can set breakpoints and step through different functions in your state diagrams to understand unexpected behavior.

A Temporal Logic Scheduler is implemented in a Simulink model. The block schedules the execution of three function-call subsystems, the third of which is outputting to a Scope block.

Stateflow Task Scheduling

Stateflow can invoke Simulink algorithms in a periodic or continuous manner to schedule the execution of components and simulate your real-time environment.

A Simulink model that has been redesigned after requirements validation. Below the model, the verification statuses of listed requirements are colored green to indicate that all the model properties are valid.

Validate Designs with Simulink

Stateflow integrates seamlessly with other MathWorks products to verify, validate, and test your designs. You can leverage these products to ensure your designs satisfy requirements, find errors earlier, and meet quality objectives.

Two application windows connected by a graphic that indicates the second window was created from the first. The first window shows a Stateflow chart and the second shows C code that was automatically generate from the chart.

Generate Code for Deployment

Code generation allows you to implement your state chart logic on embedded systems. Stateflow supports workflows to generate C, C++, VHDL, and Verilog code as well as Structured Text for PLCs.

“Until Deep Space 1, state charts and automatic code generation technology had not been used on large systems for spacecraft avionics software. MathWorks tools made this approach possible.”