Top-Level Models Using TriCores and PPU of Infineon AURIX

You can create top-level models with referenced models using TriCores and a PPU to leverage the hardware-specific code generation functionality of the PPU.

The Getting Started with PPU Acceleration for Infineon AURIX TC4x Microcontrollers example includes a top-level model with two referenced models using the TriCore 0 and PPU cores. The PPU referenced model uses a function-call subsystem that uses a code replacement library (CRL) for the PPU to replace parts of the generated code with hardware-specific code. This CRL technique optimizes the PPU run time. You can partition the application model and use the PPU core to implement the partitioned model when you have large data processing and fast execution time requirements. For more information, see Code Replacement Library for PPU.

See Also

Multicore Programming with Simulink | Concepts in Multicore Programming | Parallel Processing Unit for Optimized Code Generation | Top-Level Models Using TriCores of Infineon AURIX | Single-Core and Flat Models Using TriCore and PPU of Infineon AURIX | SoC Builder | Generate Code and Deploy Using SoC Builder

Related Topics

• Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC4x Microcontrollers
• Getting Started with PPU Acceleration for Infineon AURIX TC4x Microcontrollers
• Accelerate AI Based Software Development on Infineon AURIX TC4x Microcontroller