Multicore Simulation and Optimized Code Generation Using Infineon AURIX

Design, simulate and generate code for multicore models of Infineon^® AURIX™ TC4x microcontrollers

The Infineon AURIX TC4x microcontrollers contain six homogenous TriCore^® CPUs (TriCore 0 to TriCore 5) and a heterogeneous parallel processing unit (PPU). You can run different models on the available cores or you can partition complex models to run concurrently on these multiple cores to achieve design modularity. The Interprocess Data Channel block handles communication between the multiple cores. After simulating the multicore model, you can deploy the generated code on an Infineon AURIX TC4x hardware board using the SoC Builder tool and monitor the signals from the hardware using the One Eye tool from Infineon.

The PPU performs computations faster than the TriCores. The PPU core accelerates the performance of the model by using the code replacement libraries to replace parts of generated code with hardware-specific code. The TriCore 0 core is the principal core and it can communicate with all the remaining auxiliary cores (TriCore 1 to TriCore 5 and PPU).

After you create an SoC model by using the multiple cores of Infineon AURIX microcontroller, use the SoC Builder tool to generate executables, code, and program the hardware board. See Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC4x Microcontrollers example to understand how to validate, build, and run a multicore model to generate executables, code, and program the Infineon AURIX TC4x hardware board.

Blocks

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Interface

ADC Interface	Convert analog signal on ADC input pin to digital signal (Since R2020b)
PWM Interface	Simulate pulse width modulation (PWM) output from hardware (Since R2020b)
Digital IO Interface	Simulate digital input and output pins on processor (Since R2021b)

Interprocess Data Communication

Interprocess Data Read	Receive messages from another processor using interprocess communication channel (Since R2020b)
Interprocess Data Write	Send messages to another processor using interprocessor data write (Since R2020b)
Interprocess Data Channel	Model interprocessor data channel between two processors (Since R2020b)

Task Management

Task Manager	Create and manage task executions in Simulink model
Event Source	Simulate and playback recorded task events (Since R2020b)

Tools

SoC Builder	Build, load, and execute multicore application models on Infineon AURIX TC4x hardware boards (Since R2024b)
Hardware Mapping	Map tasks and peripherals in a model to hardware board configurations (Since R2022b)

Topics

Parallel Processing Unit for Optimized Code Generation
Use PPU to implement models with large data processing requirements or fast execution time requirements.
Top-Level Models Using TriCores of Infineon AURIX
Simulate, and generate code for top-level models with referenced models using TriCores of Infineon AURIX TC4x microcontrollers.
Top-Level Models Using TriCores and PPU of Infineon AURIX
Simulate and generate hardware-specific code for top-level models with referenced models using TriCore and PPU cores of Infineon AURIX.
Single-Core and Flat Models Using TriCore and PPU of Infineon AURIX
Simulate and generate code for single-core and flat models using multiple cores of Infineon AURIX.
Generate Code and Deploy Using SoC Builder
Generate code and run it on the target hardware board using the SoC Builder tool.

Featured Examples

Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC4x Microcontrollers

Use Embedded Coder® Support Package for Infineon® AURIX™ TC4x Microcontrollers to implement multicore modeling and communication between two cores on an Infineon® AURIX™ microcontroller. This example uses a top-level model and two referenced models for two-way multicore data communication. The model supports both simulation and code generation. You can simulate the model and deploy the code on an Infineon AURIX TC4xx TriBoard using the Soc Builder tool and observe the blinking of the configured LEDs of each core to verify the communication between the cores.

Open Model

Getting Started with PPU Acceleration for Infineon AURIX TC4x Microcontrollers

Use Embedded Coder™ Support Package for Infineon® AURIX™ Microcontrollers to improve performance using PPU accelerator and implement two-way Interprocess communication between TriCore0 and Parallel Processing Unit (PPU) on an Infineon® AURIX™ microcontroller. This example uses a top-level model and two referenced models for two-way communication between a TriCore and PPU. You can deploy the code on an Infineon AURIX TC4xx TriBoard and observe that the LEDs that you configured for each core are blinking.

Open Model

Code Verification and Validation with PIL Using PPU

Use Embedded Coder® Support Package for Infineon® AURIX™ TC4x Microcontrollers for code verification and validation using processor-in-the-loop (PIL), for top model.

Open Model

Analyze Sensorless Observers for Field-Oriented Control Using Multiple Cores of Infineon AURIX

Use Embedded Coder® Support Package for Infineon® AURIX™ Microcontrollers for sensorless field-oriented control using multiple cores of an Infineon AURIX microcontroller board. This example uses a top-level model and two referenced models. You use the TriCore0 referenced model to implement a sensor-based field-oriented control (FOC) technique to control the speed of a three-phase brushless DC (BLDC) motor. You use the TriCore1 referenced model to implement and analyze different sensorless algorithms such as the algorithms implemented in the Flux Observer (Motor Control Blockset), Sliding Mode Observer (Motor Control Blockset) and Extended EMF Observer (Motor Control Blockset) blocks.

Open Model

Accelerate AI Based Software Development on Infineon AURIX TC4x Microcontroller

Implement AI based motor control functions using the Model-Based Design approach by deploying a multi-layer perceptron (MLP) neural network on the Infineon® AURIX™ TC4x microcontroller.

Open Model