自定义板和参考设计

通过定义自定义板和参考设计将生成的 IP 核集成到目标 SoC 器件中

HDL Coder™ 可以生成可部署到 Xilinx^® Zynq^® 平台上的 IP 核。您可以将生成的 IP 核集成到默认系统参考设计中，或集成到可以为板注册的自定义参考设计中。

类

`hdlcoder.Board`	Board registration object that describes SoC custom board
`hdlcoder.WorkflowConfig`	Configure HDL code generation and deployment workflows
`hdlcoder.ReferenceDesign`	Reference design registration object that describes SoC reference design
`hdlcoder.sdr`	Create transmitter and receiver for AD936x-based software-defined radio hardware (自 R2024a 起)

socExportReferenceDesign Export custom reference design for HDL Workflow Advisor

`addExternalIOInterface`	Define external IO interface for board object
`addExternalPortInterface`	Define external port interface for board object
`addInternalIOInterface`	Add and define internal IO interface between generated IP core and existing IP cores
`addAXI4MasterInterface`	Add and define AXI4 Master interface
`addAXI4SlaveInterface`	Add and define AXI4 slave interface
`addAXI4StreamInterface`	Add AXI4-Stream interface
`addAXI4StreamVideoInterface`	Add AXI4-Stream Video interface
`addClockInterface`	Add clock and reset interface
`addFPGADataCaptureInterface`	Add and define FPGA Data Capture interface (自 R2025a 起)

`addCustomEDKDesign`	Specify Xilinx EDK MHS project file
`addCustomVivadoDesign`	Specify Xilinx Vivado exported block design Tcl file
`addIPRepository`	Include IP modules from your IP repository folder in your custom reference design
`addParameter`	Add and define custom parameters for your reference design
`validateReferenceDesign`	Check property values in reference design object
`validateBoard`	Check property values in board object

`CallbackCustomProgrammingMethod`	Function handle for custom callback function that gets executed during Program Target Device task in the Workflow Advisor
`EmbeddedCoderSupportPackage`	Specify whether to use an Embedded Coder support package
`PostBuildBitstreamFcn`	Function handle for callback function that gets executed after the build FPGA bitstream task runs
`PostCreateProjectFcn`	Function handle for callback function that gets executed after the create project task runs
`PostSWInterfaceFcn`	Function handle for custom callback function that gets executed after the generate software interface task runs
`PostTargetInterfaceFcn`	Function handle for callback function that gets executed after the set target interface task runs
`PostTargetReferenceDesignFcn`	Function handle for callback function that gets executed after the target reference design is set

Board and Reference Design Registration System
System for defining and registering boards and reference designs.
Register a Custom Board
Define the interface and attributes of a custom SoC board. After defining the board, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.
Register a Custom Reference Design
Define the interface and attributes of a custom SoC reference design. After defining and registering the reference design, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.
Define Custom Parameters and Callback Functions for Custom Reference Design
Learn how to define custom parameters and custom callback functions for your custom reference design.
Define and Add IP Repository to Custom Reference Design
Learn how you can create an IP repository and add the IP modules in the repository to your custom reference design.

Troubleshoot hardware connection issues.