供应商特定组件集成
R2026b集成供应商特定的 AMD 或 Intel 模块
HDL Coder™ 允许您将供应商特定的模块集成到您的设计中。使用性能优化的 AMD® 或 Altera® 模块构建模型并生成集成的 HDL 代码。利用 AMD Vitis® Model Composer 或 DSP Builder for Altera FPGA 等第三方工具及 HDL Coder，在设计中将各种供应商特定 HDL 模块与 Simulink® 模块集成。
主题
第三方工具
- Generate Code for AMD Blocks by Using AMD Vitis Model Composer
Generate HDL code for the model that contains AMD blocks by using AMD Vitis Model Composer. (自 R2025a 起) - Create an Altera DSP Builder Subsystem
Code generation from a model using both Altera DSP Builder and HDL Coder.
精选示例
Integrate HDL IP Core with Versal AI Engine
Model, partition, and deploy a design that leverages the processor, FPGA, and AI Engines on a Versal device.
Using Altera DSP Builder Advanced Blockset with HDL Coder
Use the Altera® DSP Builder Advanced Blockset with HDL Coder™.
