Stateflow 模块
HDL Coder 模块库包含许多模块，您可将这些模块添加到 Simulink® 建模环境并开发 HDL 算法。您还可以在 Simulink 环境中对状态转移和事件进行建模并将其与您的 HDL 算法集成。这些模块包括 Chart (Stateflow)、State Transition Table (Stateflow)、Truth Table (Stateflow) 和 Sequence Viewer (Stateflow)。
要过滤 Simulink 库浏览器以仅显示 HDL 支持的模块，请输入 hdllib。
函数
hdllib | Display blocks that are compatible with HDL code generation |
主题
- Introduction to Stateflow HDL Code Generation
Describes Stateflow support for HDL code generation.
- Generate HDL for Mealy and Moore Finite State Machines
Considerations for generating HDL code from Mealy and Moore state machines.
- Design Patterns Using Advanced Chart Features
Design patterns that take advantage of advanced features for efficient HDL code generation.
- Hardware Realization of Stateflow Semantics
How chart semantics are represented in generated HDL code; rationale for restrictions on charts that target HDL code generation.
精选示例
Generate IP Core from I2C Controller Model Built Using Stateflow
Illustrates how to model an I2C controller using an I2C Master controller modeled using Stateflow® blocks for configuring the audio codec chip.
