Stateflow Blocks

Create HDL-ready algorithms using blocks in Stateflow^® library

The HDL Coder block library contains many blocks that you can add to your develop your Simulink^® modeling environment and develop your HDL algorithm. You can also model state transitions and events and integrate them with your HDL algorithm in the Simulink environment. The blocks include Chart (Stateflow), State Transition Table (Stateflow), Truth Table (Stateflow), and Sequence Viewer (Stateflow).

To filter the Simulink Library Browser to show only HDL-supported blocks, enter hdllib.

Functions

hdllib Display blocks that are compatible with HDL code generation

Checks

Check for Stateflow chart settings

Topics

Introduction to Stateflow HDL Code Generation
Describes Stateflow support for HDL code generation.
Generate HDL for Mealy and Moore Finite State Machines
Considerations for generating HDL code from Mealy and Moore state machines.
Design Patterns Using Advanced Chart Features
Design patterns that take advantage of advanced features for efficient HDL code generation.
Hardware Realization of Stateflow Semantics
How chart semantics are represented in generated HDL code; rationale for restrictions on charts that target HDL code generation.

Featured Examples

Generate IP Core from I2C Controller Model Built Using Stateflow

Illustrates how to model an I2C controller using an I2C Master controller modeled using Stateflow® blocks for configuring the audio codec chip.

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