RAM 映射
R2026bRAM 映射是一种面积优化，它将 Simulink® 模型或 MATLAB® 代码中的存储和延迟元素映射到随机存取内存 (RAM)，而不是映射到硬件上的单个寄存器。RAM 映射可以通过减少元素消耗的寄存器数量并将这些元素存储在 RAM 模块中，来减少设计在目标硬件中使用的面积量。
函数
coder.hdl.ramconfig | Specify RAM mapping configuration for persistent array variables (自 R2023b 起) |
模型设置
| 将流水线延迟映射到 RAM | Map pipeline registers in generated HDL code to RAM |
| RAM 映射阈值 | Specify minimum RAM size for mapping to block RAMs |
| 将查找表映射到 RAM | 将查找表映射到块 RAM |
主题
- Apply RAM Mapping to Optimize Area
Map elements to RAM to optimize area on your target hardware.
- Manage How HDL Coder Maps RAM
Learn how HDL Coder™ settings affect RAM mapping.
- RAM Mapping with the MATLAB Function Block
How to use RAM mapping optimization with
MapPersistentVarsToRAMparameter for MATLAB Function blocks in your model. - Map Persistent Arrays and dsp.Delay Objects to RAM
If your MATLAB code or Simulink MATLAB Function block contains long persistent arrays or
dsp.DelaySystem object™ objects, you can reduce the FPGA resources that your design uses by mapping them to block RAM. - Map Matrices to ROM
Map matrices to implement ROM in MATLAB and Simulink.
- Configure Custom Synthesis Attributes for Simulink Blocks
This example shows how to configure custom synthesis attributes for a Simulink model using the command-line interface and propagate them to the generated HDL code.
- Use Synthesis Attributes to Map Adders to DSPs on FPGAs
Apply synthesis attributes to map adders to dedicated DSP slices for optimized FPGA implementation. (自 R2026a 起)
精选示例
Get Started with RAM and ROM in Simulink
Configure RAM blocks in Simulink® to generate synthesizable HDL code by using HDL Coder™. The generated code can be mapped by synthesis tools to dedicated RAM resources available in FPGA devices. This example also shows how to model ROM behavior in Simulink.
Map Matrices to Block RAMs to Reduce Area
Use the RAM mapping optimization in HDL Coder™ to map persistent matrix variables to block RAMs in hardware.
