联合仿真
生成 HDL 代码时，您可以选择生成包含 HDL Cosimulation 模块的 Simulink 模型，该模块在 HDL 仿真器中运行生成的 HDL 代码。该模型还包括原始 Simulink 激励生成、行为模型以及显示或分析输出的模块。该模型会比较 HDL Cosimulation 模块的输出与源子系统的输出。
函数
makehdltb | Generate HDL test bench from model or subsystem |
主题
- HDL Cosimulation (HDL Verifier)
The HDL Verifier software consists of MATLAB® functions, a MATLAB System object™, and a library of Simulink blocks, all of which establish communication links between the HDL simulator and MATLAB or Simulink.
- Generate Cosimulation Model
Automatically generate a Simulink model that cosimulates with your HDL simulator.
- Set Up for HDL Cosimulation (HDL Verifier)
To cosimulate your HDL code with a MATLAB or Simulink design, you must first:
- Automatic Verification of Generated HDL Code from Simulink (HDL Verifier)
Verify generated HDL code using a generated cosimulation model.
- Choose a Test Bench for Generated HDL Code
Select a generated test bench.
精选示例
HDL Verifier Cosimulation Model Generation in HDL Coder
Reuse an existing Simulink® model to verify HDL Coder™ generated hardware designs using an HDL Verifier™ cosimulation test bench.
