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Intel FPGA and SoC Devices

Generate and deploy HDL code and embedded software on Intel® FPGA and SoC Devices

HDL Coder™ can generate an IP core, integrate it into your Qsys project, and program the Intel hardware. Using Embedded Coder®, you can generate and build the embedded software, and run it on the ARM® processor. See Hardware-Software Co-Design Workflow for SoC Platforms.

To deploy your design to the Intel FPGA and SoC device, you must install the HDL Coder Support Package for Intel FPGA and SoC Devices. For installation information, see HDL Coder Supported Hardware.

HDL Coder Support Package for Intel FPGA and SoC Devices supports the generation of IP cores that can be integrated into FPGA designs using Intel Qsys. When used in combination with the Embedded Coder Support Package for Intel SoC Devices, this solution can program the Intel SoC using C and HDL code generation. The hardware-software co-design workflow spans simulation, prototyping, verification, and implementation.

Device FamilyBoardAvailable Reference Designs

Arria® 10 SoC

Intel Arria 10 SoC development kit

Default System

Default system with External DDR4 Memory Access

Cyclone® V

Cyclone V SoC development kit - Rev.C

Default System

Cyclone V SoC development kit - Rev.D

Arrow SoCKit development board

Arria 10

Arria 10 GX FPGA development kit

PCIe AXI Manager with External DDR4 Memory Access (Requires HDL Verifier)

JTAG AXI Manager with External DDR4 Memory Access (Requires HDL Verifier)

Intel MAX® 10

Arrow® DECA MAX 10 FPGA evaluation kit

Default System

AXI Manager - Ethernet (Requires HDL Verifier) (HDL Verifier)

Note

To extend support to new hardware, see Deploy IP Core on Custom Hardware.

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