处理器软件
R2026b为 SoC 应用的嵌入式处理器组件设计和开发软件
在 SoC 应用中创建软件的 Simulink® 模型。将算法封装为计时器驱动和事件驱动的任务子系统的集合。定义任务的计时和持续时间特征。
模块
 | Task Manager | Create and manage task executions in Simulink model |
 | Proxy Task | A placeholder for a task in your application |
 | Task Trigger | Trigger task execution in your application (自 R2023b 起) |
 | Task Trigger Merge | Merge multiple task triggers into one trigger (自 R2023b 起) |
 | Hardware Interrupt | Trigger downstream function-call subsystem from interrupt service routine (自 R2024b 起) |
| Task Manager | Create and manage task executions in Simulink model |
 | Testbench Task | An external timer-driven task load on your SoC processor application |
 | Event Source | Simulate and playback recorded task events |
函数
socTaskTimes | Plot histogram of the task durations from a recorded Simulation Data Inspector run |
socHardwareUsage | Generate processor core usage statistics from a recorded Simulation Data Inspector run |
socTaskSchedulability | Determine whether set of tasks can be scheduled for specified core assignments (自 R2022b 起) |
socCreateModel | Creates a skeleton SoC Blockset for AMD model for task set (自 R2022b 起) |
配置文件和构造型
soc_blockset_profile | Profile for SoC Blockset for AMD systems |
ProcessorCore | Stereotype for a processor core |
PeriodicSoftwareTask | Stereotype for a periodic software task |
AperiodicSoftwareTask | Stereotype for an aperiodic software task |
工具
主题
设计
- What is Task Execution? (SoC Blockset)
Learn the definition of task execution and task life-cycle in a processor. - Timer-Driven Task (SoC Blockset)
Create Simulink models with timer-driven task subsystems. - Event-Driven Tasks (SoC Blockset)
Create Simulink models with event driven task subsystems. - Task Duration (SoC Blockset)
Set the execution time or duration of a task in Task Manager block. - Kernel Latency (SoC Blockset)
Specify the kernel response time or latency to start a task execution instance. - Task Management with Schedule Editor (SoC Blockset)
Manage tasks in SoC processor models using the Schedule Editor app. - Value and Caching of Task Subsystem Signals (SoC Blockset)
Signals entering and exiting task subsystems can capture Task Manager block. - Design SoC Model Using System Composer (SoC Blockset)
Author, analyze, and transform the architecture of a software system for an SoC device.
仿真
- Task Overruns and Countermeasures (SoC Blockset)
Simulation of task execution experiencing overruns and countermeasures available to either prevent or mitigate overruns. - Task Priority and Preemption (SoC Blockset)
Use Task Manager block to set task priorities and define task execution order with preemption. - Task Execution Playback Using Recorded Data (SoC Blockset)
Replay task execution timing using recorded task timing data from previous simulations or processors.
编译和测量
- Code Generation of Software Tasks (SoC Blockset)
Mapping between tasks in an SoC application model and threads in generated code. - Code Instrumentation Profiler (SoC Blockset)
Use code instrumentation profiling to measure task execution timing on an SoC device. - Kernel Instrumentation Profiler (SoC Blockset)
Use kernel instrumentation profiling to measure task execution timing on an SoC device. - Recording Tasks for Use in Simulation (SoC Blockset)
Task execution timing data and statistics recorded during simulation or from hardware.
可视化
- Task Visualization in Simulation Data Inspector (SoC Blockset)
Visualize the timing and execution states of tasks in the Simulation Data Inspector. - Multicore Execution and Core Visualization (SoC Blockset)
Configure and visualize task execution for single and multicore processor systems.
精选示例
Task Execution Using Altera SoC Devices
Simulate task execution and how to generate code and run it on an SoC hardware board.
Triggering Software Tasks by FPGA Interrupts Using Altera SoC Devices
Model an algorithm partitioned between hardware and software. The hardware IP is implemented in FPGA fabric, and triggers a software task implemented in the embedded processor. Design, simulate, and implement a complete design on SoC hardware.
