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SinCos

Implement control signal based sine and cosine function

Since R2020b

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  • HDL Math SinCos Block

Description

HDL Math Sine Block

The SinCos block computes the sine and cosine of input signal. The block uses the coordinate rotation digital computer (CORDIC) approximation method. For more information, see CORDIC approximation method in Algorithms. The block has control signals that indicate whether the input and output data are valid. You can also specify the number of iterations of the algorithm and the latency strategy.

To use this block in your Simulink® model, open the HDLMathLib library by entering this command in the MATLAB® Command Window:

open_system('HDLMathLib')

Latency Considerations

You can simulate the SinCos block with latency. This block is a masked subsystem that contains a MATLAB Function block, LumpLatency. The subsystem uses this MATLAB Function block to compute the latency based on the Number of iterations. To view the function that computes the latency of the block, open the LumpLatency block in the masked subsystem. To view inside the mask, click the ⇩ icon on the block.

The maximum latency LMax of SinCos block is given by this equation:

LMax = N + 1

where N is the value of the Number of iterations parameter.

The minimum latency LMin of SinCos block is 2 when Number of iterations is less than or equal to 2. For the number of iterations greater than 2, the minimum latency is given by this equation:

LMin = 2 + ceil((N -1) / 3)

The block supports four latency modes. You can specify a custom latency value by setting the Latency Strategy parameter to Custom. For more information, see Custom latency.

Examples

Implement Sine and Cosine Block with Control Signals

Implement Sine and Cosine Block with Control Signals

Implement the control-signal based SinCos block and use it generate HDL code.

Limitations

The block has these limitations:

  • Does not support floating-point data types, such as half, single, and double.

  • Cannot be used in Synchronous Subsystem.

  • Does not support resource sharing optimization.

Ports

Input

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Input data signal to compute sine and cosine function. The input value ranges from -2π to 2*π.

Data Types: int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | bus

Input control signal that indicates whether the input signal is valid.

Data Types: Boolean

Output

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Output data signal that is the sine of the input signal.

Data Types: int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | bus

Output data signal that is the cosine of the input signal.

Data Types: int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | bus

Output control signal that indicates whether output signal is valid.

Data Types: Boolean

Parameters

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Specify the number of iterations for CORDIC algorithm.

Programmatic Use

Block Parameter: iter
Type: character vector
Values: Integer values
Default: '11'

Specify whether to map the blocks in your design to minimum, maximum, custom, or zero latency. For more information, see LatencyStrategy.

Programmatic Use

Block Parameter: latencyMode
Type: character vector
Values: 'Max' | 'Min' | 'Custom' | 'Zero'
Default: 'Max'

When you set Latency strategy to Custom, use this parameter to specify the custom latency value. The latency must be a nonnegative integer in the range [0, L], where L is the maximum latency value of SinCos block. For more information, see CustomLatency.

Dependency

To enable this parameter, set Latency strategy to Custom.

Programmatic Use

Block Parameter: customLatencyValue
Type: Integer
Values: 0 to Max latency
Default: 0

Tips

The block supports HDL code generation using HDL Coder™. HDL Coder provides additional configuration options that affect HDL implementation and synthesized logic. For more information, see HDL Block Properties.

Algorithms

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References

[1] Volder, Jack E., “The CORDIC Trigonometric Computing Technique.” IRE Transactions on Electronic Computers EC-8 (1959); 330–334.

[2] Andraka, Ray “A Survey of CORDIC Algorithm for FPGA Based Computers.” Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays. Feb. 22–24 (1998): 191–200.

[3] Walther, J.S., “A Unified Algorithm for Elementary Functions,” Proceedings of the Spring Joint Computer Conference, May 18-20, 1971: 379–386.

[4] Schelin, Charles W., “Calculator Function Approximation,” The American Mathematical Monthly 90, no. 5 (1983): 317–325.

Version History

Introduced in R2020b

See Also

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