Veloce Strato Platform
Emulation platform to reduce risk in the verification of complex SoCs
Highlights
- Allows fluid transaction-based communication between abstract virtual models and high-fidelity RTL models
- Allows progressive and incremental refinement from virtual TLM SoC models to silicon bound RTL
- Improves end product quality by increasing the total verification cycles on the design before committing to silicon prototypes
- Reduces silicon spins due to functional problems by enabling full-system integration testing before first silicon
- Allows developers to do emulator-based embedded software design in parallel to their hardware device fabrication
- Integrates with MATLAB and Simulink to allow reuse of high-level test bench and models
Description
The Veloce® Strato™ Emulation Platform combines a hardware architecture, innovative operating system, specialized applications, and versatile peripheral solutions to deliver a comprehensive and flexible high-speed, high-capacity verification environment. Veloce provides uncompromised visibility and debug.
The Veloce Strato Platform is made up of three key components:
- Veloce Strato Hardware and Software Platform – Engineered to scale to support 15 BG designs, capable of verifying the largest chips ever designed while helping to meet your performance and power requirements
- Veloce Apps – Run on the Veloce operating system to leverage the proven, robust capabilities of the Veloce emulator to solve specific verification and validation challenges
- Veloce Protocol Solutions - Use protocol-specific hardware and virtual devices and standards-based, high-speed transactors to exercise all peripherals in a design
The Veloce platform is engineered to scale to support 15 billion gate designs and establishes a roadmap into the next decade capable of verifying the largest chips ever designed. Because the Veloce Strato Platform is fully scalable, a user can obtain what they need now in terms of capacity and increase capacity along the way as their design sizes grow. In addition, the software that runs on the Veloce Strato platform is fully scalable. All the applications built for previous generation Veloce platforms are fully reusable on Veloce Strato.
- The integration enables engineers to validate SoCs as part of a system-of-systems (SoS) design and verification environment.
- The Veloce testbench connects with MATLAB® using the MATLAB engine API, to directly call user functions in MATLAB.
- This allows MATLAB users to reuse their high-level stimulus test cases and models when verifying RTL designs in Veloce.
- For example, discrete sampled signal stream data in and out digital FIR filters, FFT spectral analyzers, etc. being modeled in RTL (possibly using HDL Coder™ technology)
- Veloce also supports data flow back to MATLAB for visual display of data, such as frequency domain plots, etc.
- Veloce System Interconnect Application allows more powerful IEEE TLM-2.0 based use models to easily connect into Simulink® via S-function gateways.
- This is particularly useful in automotive digital twin simulation models that make heavy use of Simulink based dynamic models and interfaces to automotive scenario simulators (Siemens PreScan™, CARLA).
- 5G Toolbox™ for MATLAB can be used for I/Q data generation to Veloce DUTs.
- Veloce includes code and documentation for how users can integrate MATLAB-based stimulus into their verification environments.

Siemens EDA
8005 SW Boeckman Road
Wilsonville, OR 97070-7777
UNITED STATES
Tel: 503-685-7000
info@mentor.com
www.siemens.com
Required Products
Recommended Products
Platforms
- Linux
- Macintosh
- Windows
Support
- Consulting
- System integration
- Telephone
- Training
Product Type
- Verification and Validation Tools
Tasks
- Communications Systems
- Control Systems
- Embedded Systems
- FPGA Design
- System Modeling and Simulation
- ASIC and SoC Design
Industries
- Aerospace and Defense
- Automotive
- Communication Devices
- Communication Infrastructure
- Semiconductor