Wireless HDL Toolbox provides pre-verified, hardware-ready Simulink blocks and subsystems for developing 5G, LTE, WLAN, satellite (DVB-S2, GPS, and CCSDS), and custom OFDM-based wireless communication applications. The toolbox includes reference applications for wireless standards and IP blocks.
You can modify the reference applications for integration into your own design. HDL implementations of the toolbox algorithms are optimized for efficient resource usage and performance for prototyping or for production deployment on FPGA, ASIC, and SoC devices.
The toolbox algorithms generate readable, synthesizable code in VHDL® and Verilog® (with HDL Coder). You can verify the generated HDL code on FPGA hardware from Simulink using FPGA in the loop cosimulation. Also, you can generate SystemVerilog DPI components to verify wireless applications in an HDL environment (with HDL Verifier). For over-the-air testing, you can connect transmitter and receiver models to radio devices (with Communications Toolbox and SoC Blockset hardware support packages).
5G New Radio (NR)
Integrate prebuilt and verified 5G NR subsystem IP for cell search and master/system information block (MIB/SIB1) recovery. Design custom 5G subsystems for hardware with 5G NR IP blocks (such as LDPC, Polar, and CRC).
Satellite Communications
Design satellite communications systems based on DVB-S2, CCSDS, and GPS for FPGA or ASIC implementation. Integrate subsystem IP such as a DVB-S2 Receiver, or develop your own using HDL-optimized IP blocks.
WLAN
Develop wireless LAN communications systems for FPGA or ASIC hardware. Get started with a WLAN receiver or time and frequency synchronization subsystem, or create custom functionality with IP blocks.
LTE
Integrate prebuilt and verified 4G LTE subsystem hardware IP for cell search, master/system information block (MIB/SIB1) recovery, or a multiple-input multiple-output (MIMO) LTE transmitter.
Custom Communications
Use hardware-proven building block IP to develop custom communications systems. Get started quickly with example designs such as a digital pre-distorter (DPD) or generic low-density parity-check (LDPC) encoder and decoder.
Verification
Simulate hardware-ready models while comparing results against the MATLAB reference algorithms. Use HDL Verifier to cosimulate with the generated HDL or to generate models for RTL verification.
FPGA, ASIC, and SoC Deployment
Use HDL Coder to deploy your application on FPGA-based software-defined radio (SDR) platforms to prototype with live over-the-air signals. Reuse the same application models for production deployment.
Product Resources:
"We started with a working example from MathWorks that included 5G new radio cell search and master information block recovery and modified the design to match customer requirements. This helped simplify our work and saved us a lot of time“
