外设管理
使用模块、外设 App 和配置参数设置配置 Infineon® AURIX™ TC4x 微控制器
在与目标硬件通信之前,请先应用模块设置、硬件配置参数和外设 App 设置。
模块
工具
硬件映射 | Map tasks and peripherals in a model to hardware board configurations (自 R2022b 起) |
任务 | Map tasks in the Infineon AURIX to interrupt service routines on the hardware board (自 R2022b 起) |
数字端口读取外设配置 | Map Digital Port Read peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2022b 起) |
数字端口写入外设配置 | Map Digital Port Write peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2022b 起) |
编码器外设配置 | Map encoder peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2022b 起) |
PWM 外设配置 | Map PWM peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2022b 起) |
QSPI 外设配置 | Map QSPI peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2022b 起) |
TMADC 外设配置 | Map TMADC peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2022b 起) |
DSADC 外设配置 | Map DSADC peripherals in the Infineon AURIX model to peripheral registers in the MCU (自 R2023b 起) |
SENT 配置 | Map data transfer over SENT protocol in the Infineon AURIX model to peripheral registers in the MCU (自 R2023b 起) |
FCC 外设配置 | Map FCC peripherals in the model to peripheral registers in MCU (自 R2024a 起) |
解析器外设配置 | Map resolver peripherals in model to peripheral registers in MCU (自 R2024a 起) |
CDSP 外设配置 | Map CDSP peripherals in the model to peripheral registers in the MCU (自 R2024a 起) |
模型设置
主题
- Run Model on Virtual Prototyping (VP)
Run your model on virtual prototyping without the hardware using the Synopsys Virtual Prototyping (VP) Virtualizer.