Address Model Incompatibilities or Analysis Timeout

Adjust your model, model parameters, or analysis options to better analyze your model

Before you start an analysis, you can run a compatibility check on your model. The model is compatible for analysis when:

The model is compiled into an executable form.
The model is compatible with code generation.
The model performs zero-second simulation with no errors; that is, the simulation start and stop time is 0.

If the model is incompatible, you can identify and fix the incompatibilities through the Diagnostic Viewer messages. You can use the Test Generation Advisor results to better understand your model, particularly large models, complex models, or models for which you are uncertain of their compatibility with Simulink^® Design Verifier™.

Topics

Start Here

Bottom-Up Approach to Model Analysis
Explains the benefits of analyzing a model starting with low-level elements.
Model Representation for Analysis
Describes model representation that Simulink Design Verifier uses for analysis.
Configure Model Representation Options
Describes how to configure model representation options. Simulink Design Verifier uses for analysis.
Use Test Generation Advisor to Identify Analyzable Components
Use the Test Generation Advisor to guide model and component analysis.

Parameter Configuration

Parameter Configuration for Analysis
Overview of parameter configuration for Simulink Design Verifier analysis.
Specify Parameter Configuration for Full Coverage
An example of how to specify parameter constraint values to achieve full model coverage.
Specify Parameter Configuration for Structure or Bus Parameters
This example describes how to generate tests that constrain the values for the structures and bus signals in a model.

Address Model Incompatibilities

Handle Incompatibilities with Automatic Stubbing
How to use automatic stubbing.
Analyze Test Harness with Schedule for Initialize, Reset, Reinitialize, and Terminate Functions
Analyze model that contains schedules for Initialize, Reinitialize, Reset, and Terminate ports. (Since R2024b)
Configuring S-Function for Test Case Generation
This example shows how to compile an S-Function to be compatible with Simulink® Design Verifier™ for test case generation.

Address Analysis Timeout

Share Simulink Cache File for Faster Analysis
Use Simulink cache files to share and reuse the model representation for analysis.
Run Additional Analysis to Reduce Instances of Rational Approximation
This example shows how to reduce the instances of rational approximation by running additional analysis.
Prove Properties in Large Models
Describes workflows and best practices for proving properties in large models.
Increase Allocated Memory for Analysis Report Generation
Explains how to increase the amount of memory so the software can create reports for large models.
Manage Model Data to Simplify the Analysis
Simplify your model to simplify the Simulink Design Verifier analysis.
Perform Analysis on Large Models
Describes techniques for analyzing a large model.