分析模型或子系统

准备用于分析的模型或子系统，运行分析

在构建模型时，使用 Simulink^® Design Verifier™ 来指导设计过程。检查现有模型的兼容性。解决模型中的兼容性限制或自定义模型元素以进行分析。运行设计错误检测并生成测试用例或证明模型中的属性。

函数

`sldvcompat`	Check model for compatibility with analysis
`sldvextract`	Extract subsystem or subchart contents into new model for analysis
`sldvisactive`	Verify updating of a block diagram
`sldvoptions`	Create design verification options object
`sldvtimer`	Identify, change, and display timer optimizations
`sldvrun`	Analyze model

主题

检查模型或子系统的兼容性

Overview of the Simulink Design Verifier Workflow
Overview of the basic Simulink Design Verifier workflow.
Check Model Compatibility
Describes how to check whether your model is compatible with Simulink Design Verifier.

分析模型或子系统

What Is Component Verification?
An overview of the two approaches to component verification.
Analyze a Stateflow Atomic Subchart
Analyzing an atomic subchart using Simulink Design Verifier software.
Analyze a Model
Analyzing a simple example model with Simulink Design Verifier.
Analyze a Simple Model
Analyzing a simple model that demonstrates Simulink Design Verifier capabilities.
Perform Analysis on Large Models
Describes techniques for analyzing a large model.
Simulink Design Verifier Options
Overview of the Simulink Design Verifier options in the Configuration Parameters dialog box.
Parameter Configuration for Analysis
Overview of parameter configuration for Simulink Design Verifier analysis.
Simulink Design Verifier Checks
Describes Model Advisor checks for Simulink Design Verifier analysis.
Analyze Coverage for Lookup Table Boundary Values
Describes how to generate tests for lookup table boundary value coverage.
Analyze Export-Function Models
Analyzing an export-function models by using Simulink Design Verifier.
Analyze Export-Function Model with Global Simulink Function
Analyze an export-function model with global Simulink function by using Simulink Design Verifier.
Analyze AUTOSAR Component Models
Analyze AUTOSAR component models for the Classic Platform.
Inspect Test Generation Objectives by Using Model Slicer
Inspect Test Generation Objectives using Model Slicer.
Functions for Component Verification
Describes the Simulink Design Verifier functions you can use for component verification.
Verify a Component for Code Generation
This example uses the slvnvdemo_powerwindow model to show how to verify a component in the context of the model that contains that component.

分析模型或子系统

函数

主题

检查模型或子系统的兼容性

分析模型或子系统

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