Peripheral Management

Configure Infineon^® AURIX™ TC3x microcontrollers using blocks, peripheral app and configuration parameter settings

Before communicating with target hardware, first apply block settings, hardware configuration parameters and the peripheral app settings.

Blocks

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AURIX TC3x

Digital Port Read	Read GPIO pin(s) status (Since R2024a)
Digital Port Write	Set GPIO pin(s) status (Since R2024a)
Hardware Interrupt	Trigger downstream function-call subsystem from an interrupt service routine (Since R2022b)
Encoder	Measures rotation of motor in ticks (Since R2024a)
EVADC	Measure voltage of an analog input pin (Since R2024a)
PWM	Generate pulse width modulated waveforms (Since R2024a)
QSPI Controller	Write data to and read data from an SPI peripheral device (Since R2024a)
QSPI Peripheral	Write data to and read data from an SPI peripheral device (Since R2024a)
EDSADC	Measure voltage of analog input pin using delta-sigma conversion (Since R2024b)
SENT	Read high-resolution sensor data over Single Edge Nibble Transmission (SENT) protocol (Since R2024b)

Utilities

Memory Copy	Copy data from and to memory section
Byte Pack	Convert input signals to `uint8` vector
Byte Unpack	Convert `uint8` vector to input signals
Byte Reversal	Reverse order of bytes in input word

Interface

ADC Interface	Convert analog signal on ADC input pin to digital signal (Since R2020b)
PWM Interface	Simulate pulse width modulation (PWM) output from hardware (Since R2020b)
Digital IO Interface	Simulate digital input and output pins on processor (Since R2021b)

Interprocess Data Communication

Interprocess Data Read	Receive messages from another processor using interprocess communication channel (Since R2020b)
Interprocess Data Write	Send messages to another processor using interprocessor data write (Since R2020b)
Interprocess Data Channel	Model interprocessor data channel between two processors (Since R2020b)

Task Management

Task Manager	Create and manage task executions in Simulink model
Event Source	Simulate and playback recorded task events (Since R2020b)

Tools

SoC Builder	Build, load, and execute multicore application models on Infineon AURIX TC4x hardware boards (Since R2024b)
Hardware Mapping	Map tasks and peripherals in a model to hardware board configurations (Since R2022b)
Digital Port Read Peripheral Configuration	Map Digital Port Read peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
Digital Port Write Peripheral Configuration	Map Digital Port Write peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
Tasks	Map tasks in the Infineon AURIX to interrupt service routines on the hardware board (Since R2024a)
Encoder Peripheral Configuration	Map encoder peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
EVADC Peripheral Configuration	Map EVADC peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
PWM Peripheral Configuration	Map PWM peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
QSPI Controller Peripheral Configuration	Map QSPI controller peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
QSPI Peripheral Configuration	Map QSPI peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2024a)
EDSADC Peripheral Configuration	Map EDSADC peripherals in Infineon AURIX model to peripheral registers in MCU (Since R2024b)
SENT Configuration	Map data transfer over SENT protocol in the Infineon AURIX model to peripheral registers in the MCU (Since R2024b)

Model Settings

Model Configuration Parameters

Topics

Run Model on Virtual Prototyping (VP)
Run your model on virtual prototyping without the hardware using the Synopsys Virtual Prototyping (VP) Virtualizer.
Processor-in-the-Loop (PIL) Simulation
Test the code generated from top models, referenced models, or subsystems on Infineon AURIX TC3x microcontrollers.
External Mode Simulation for Signal Monitoring and Parameter Tuning
Tune parameters and monitor signals through communication channel between development computer and Infineon AURIX TC3x microcontroller.

Featured Examples

Getting Started with Embedded Coder Support Package for Infineon AURIX TC3x Microcontrollers

Use Embedded Coder® Support Package for Infineon® AURIX™ TC3x Microcontrollers to run a Simulink® model on Infineon AURIX TC3x board.

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Getting Started with QSPI Communication for Infineon AURIX TC3x Microcontrollers

The use the QSPI Controller and QSPI Peripheral blocks from Embedded Coder® Support Package for Infineon® AURIX™ TC3x Microcontrollers to handle data through interrupts.

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Code Verification and Validation with PIL

Use Embedded Coder® Support Package for Infineon AURIX™ TC3x Microcontrollers for code verification and validation using PIL.

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Signal Monitoring and Parameter Tuning Using Infineon AURIX TC3x Microcontrollers

Use Embedded Coder® Support Package for Infineon® AURIX™ TC3x Microcontrollers in Monitor and Tune mode (External mode) using Infineon AURIX TC3x hardware board.

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Field-Oriented Control of BLDC with Encoder Using Infineon AURIX TC3xx Microcontrollers

Implement the field-oriented control (FOC) technique to control the speed of a three-phase brushless DC (BLDC) motor. The FOC algorithm requires rotor position feedback, which is obtained by using an encoder sensor. For more details about FOC, see Field-Oriented Control (FOC) (Motor Control Blockset).

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Extrapolate EDSADC Output Using Timestamp Information

Use the Enhanced Delta-Sigma Analog to Digital Converter (EDSADC) block from Embedded Coder® Support Package for Infineon® AURIX™ TC3x Microcontrollers to determine the accurate EDSADC output using its timestamp information.

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Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC3x Microcontrollers

Use Embedded Coder® Support Package for Infineon® AURIX™ TC3x Microcontrollers to implement multicore modeling and communication between two cores on an Infineon® AURIX™ microcontroller. This example uses a top-level model and two referenced models for two-way multicore data communication. The model supports both simulation and code generation. You can simulate the model and deploy the code on an Infineon AURIX TC3x hardware board using the Soc Builder tool and observe the blinking of the configured LEDs of each core to verify the communication between the cores.

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