Main Content
Analyze Model or Subsystem
Prepare model or subsystem for analysis, run analysis
Use Simulink® Design Verifier™ to guide the design process as you build your model. Check the compatibility of an existing model. Work around compatibility limitations in your model or customize model elements for analysis. Run design error detection and generate test cases or prove properties in your model.
Functions
sldvcompat | Check model for compatibility with analysis |
sldvextract | Extract subsystem or subchart contents into new model for analysis |
sldvisactive | Verify updating of a block diagram |
sldvoptions | Create design verification options object |
sldvtimer | Identify, change, and display timer optimizations |
sldvrun | Analyze model |
sldvexporttoversion | Exports a data file for use in a previous version of Simulink Design Verifier (Since R2024a) |
Topics
Check Compatibility of a Model or Subsystem
- Overview of the Simulink Design Verifier Workflow
Overview of the basic Simulink Design Verifier workflow. - Check Model Compatibility
Describes how to check whether your model is compatible with Simulink Design Verifier.
Analyze a Model or Subsystem
- What Is Component Verification?
An overview of the two approaches to component verification. - Analyze a Stateflow Atomic Subchart
Analyzing an atomic subchart using Simulink Design Verifier software. - Analyze a Model
Analyzing a simple example model with Simulink Design Verifier. - Analyze a Simple Model
Analyzing a simple model that demonstrates Simulink Design Verifier capabilities. - Perform Analysis on Large Models
Describes techniques for analyzing a large model. - Simulink Design Verifier Options
Overview of the Simulink Design Verifier options in the Configuration Parameters dialog box. - Parameter Configuration for Analysis
Overview of parameter configuration for Simulink Design Verifier analysis. - Simulink Design Verifier Checks
Describes Model Advisor checks for Simulink Design Verifier analysis. - Analyze Coverage for Lookup Table Boundary Values
Describes how to generate tests for lookup table boundary value coverage. - Analyze Export-Function Models
Analyzing an export-function models by using Simulink Design Verifier. - Analyze Export-Function Model with Global Simulink Function
Analyze an export-function model with global Simulink function by using Simulink Design Verifier. - Analyze Export-Function Model with Function-Call Subsystems
Analyze an export-function model with function-call subsystems by using Simulink Design Verifier. - Analyze AUTOSAR Component Models
Analyze AUTOSAR component models for the Classic Platform. - Inspect Test Generation Objectives by Using Model Slicer
Inspect Test Generation Objectives using Model Slicer. - Functions for Component Verification
Describes the Simulink Design Verifier functions you can use for component verification. - Verify a Component for Code Generation
This example uses theslvnvdemo_powerwindow
model to show how to verify a component in the context of the model that contains that component.